In 2013, he joined the Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada. He has spent several years in industrial research. He was with Rambus Laboratory, Sunnyvale, CA, USA, as a Senior Member of Technical Staff, where he was involved in advanced equalization and clock recovery techniques for highspeed interfaces. From 2008 to 2010, he was with Analog and Mixed Signal Division, Gennum Corporation, Burlington, ON, where he was involved in the development of world's highest capacity and most power efficient cross point router solution. degree from the University of Toronto, Toronto, ON, in 2010. degree from Queen's University, Kingston, ON, Canada, in 2005, and the Ph.D. degree from the Bangladesh University of Engineering and Technology, Dhaka, Bangladesh, in 2002, the M.Sc. As there is no standard model or performance metrics to evaluate the efficiency of the new DNN hardwares in the literature, the classification model can help to identify appropriate performance parameters and benchmark accelerators. Existing hardware accelerators for inference are broadly classified into these three categories. We identify three major areas, ALU, dataflow, and sparsity, in hardware architectures having the potential to improve the overall performance of an accelerator. Therefore, understanding the tradeoff between different hardware accelerators helps to identify the best accelerator model for application deployment. For example, the hardware optimized for sparse DNNs may provide poor performance for dense DNNs in terms of power and throughput. Each optimization technique generally improves one or more specific performance parameter(s). A mid range model is offered with the same specs for 869, although its processor is a 2.6GHz dual core with a turbo boost to 3.1GHz.
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In this paper, existing DNN hardware accelerators are reviewed and classified based on the optimization techniques used in their implementations. Our review unit topped the range with a 2.8GHz dual-core CPU (Turbo boost to 3.3GHz), Intel Iris graphics, 8GB of RAM and a 1TB fusion drive. Therefore, domain-specific hardware accelerators are required to provide high computational resources with superior energy efficiency and throughput within a small chip area. General-purpose processors are unable to process complex DNNs within the required throughput, latency, and power budget. The complexity of the DNN models generally increases with application complexity and deployment of complex DNN models requires high computational power. The DNNs deliver the state-of-the-art performance in many applications. Deep neural networks (DNNs) have become an essential tool in artificial intelligence, with a wide range of applications such as computer vision, medical diagnosis, security, robotics, and autonomous vehicle.
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